Skip to search formSkip to main contentSkip to account menu

Redistribution layer

A redistribution layer (RDL) is an extra metal layer on a chip that makes the IO pads of an integrated circuit available in other locations. When an… 
Wikipedia (opens in a new tab)

Related topics

Related topics

6 relations
Input/outputIntegrated circuitList of integrated circuit packaging typesThree-dimensional integrated circuit

Broader (1)

Semiconductor device fabrication

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
The Development and the Integration of the 5 µm to 1 µm Half Pitches Wafer Level Cu Redistribution Layers
The original purpose of the Re-Distribution Layers(RDL) was to assist in the adaption of metal bumping and flip chip packaging… 
2014
2014
A Novel Micromachined AlGaN/GaN Power HEMT With Air-Bridged Matrix Heat Redistribution Layer Design
This letter develops a thermally stable micromachined AlGaN/GaN high electron mobility transistor (HEMT) on an Si substrate with… 
2011
2011
Modelling of through silicon via and devices electromagnetic coupling
2010
2010
Advances in Wafer Level Packaging (WLP)
2010
2010
Double side redistribution layer process on embedded wafer level package for package on package (PoP) applications
In this paper, an embedded wafer level package with Cu through mold via (TMV) interconnects was developed for package on package… 
2009
2009
Income Redistribution and Public Good Provision: an Experiment
We provide a new experimental investigation of the neutrality theorem of Warr (1983), who states ”when a single public good is… 
2009
2009
3D integration of image sensor SiP using TSV silicon interposer
3D system integration is a fast growing field that encompasses different types of technologies. [1] The technology chosen for a… 
2008
2008
Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP)
2008
2008
Low-K Interconnect Stack with Thick Metal 9 Redistribution Layer and Cu Die Bump for 45nm High Volume Manufacturing
Interconnect process features are described for a 45nm high performance logic technology. Through extensive use of highly… 
2006
2006
Factorial Analysis of Chip-on-Metal WLCSP Technology with Fan-Out Capability
In this study, a wafer level chip scaled packaging (WLCSP) having the capability of redistributing the electrical circuit is… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)