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Pipeline (computing)
Known as:
Pipeline
, Pipeline (computer)
, Pipe
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In computing, a pipeline is a set of data processing elements connected in series, where the output of one element is the input of the next one. The…
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50 relations
256-bit
AIPS
AMULET microprocessor
ARM architecture
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2007
Highly Cited
2007
A Fast Mode Decision Algorithm and Its VLSI Design for H.264/AVC Intra-Prediction
Jia-Ching Wang
,
Jhing-Fa Wang
,
J. Yang
,
Jang-Ting Chen
IEEE transactions on circuits and systems for…
2007
Corpus ID: 10884869
In this paper, we present a fast mode decision algorithm and design its VLSI architecture for H.264 intra-prediction. A regular…
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Highly Cited
1998
Highly Cited
1998
A low-power IDCT macrocell for MPEG2 MP@ML exploiting data distribution properties for minimal activity
T. Xanthopoulos
,
A. Chandrakasan
Symposium on VLSI Circuits. Digest of Technical…
1998
Corpus ID: 14383164
This work describes the implementation of a low power IDCT chip targetted to medium and low bitrate applications. Our strategy…
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Highly Cited
1997
Highly Cited
1997
Skew-tolerant domino circuits
David L. Harris
,
M. Horowitz
IEEE International Solids-State Circuits…
1997
Corpus ID: 1387405
As cycle time of chips shrinks and die size grows, clock skew measured as a fraction of the cycle time is increasing. Traditional…
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Highly Cited
1997
Highly Cited
1997
Renumbering strategies for unstructured-grid solvers operating on shared-memory, cache-based parallel machines
R. Loehner
1997
Corpus ID: 61484452
Highly Cited
1996
Highly Cited
1996
Pipeline rendering: interaction and realism through hardware-based multi-pass rendering
P. Diefenbach
1996
Corpus ID: 14645541
While large investments are made in sophisticated graphics hardware most realistic rendering is still performed o line using ray…
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Highly Cited
1991
Highly Cited
1991
Pipelined Communications in Optically Interconnected Arrays
Zicheng Guo
,
R. Melhem
,
R. W. Hall
,
D. Chiarulli
,
S. Levitan
J. Parallel Distributed Comput.
1991
Corpus ID: 15804060
Highly Cited
1988
Highly Cited
1988
Programmable DSP architectures. II
E. Lee
IEEE ASSP Magazine
1988
Corpus ID: 29580985
For pt.I see ibid., vol.5, no.4, p.4-19, Oct. 1988. Three distinct techniques are used for dealing with pipelining, namely…
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Highly Cited
1988
Highly Cited
1988
The optimization of direct digital frequency synthesizer performance in the presence of finite word length effects
H. T. Nicholas
,
H. Samueli
,
B. Kim
Proceedings of the 42nd Annual Frequency Control…
1988
Corpus ID: 195706605
Techniques for the design of VLSI architectures for direct digital frequency synthesis have been introduced that allow for the…
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Highly Cited
1983
Highly Cited
1983
Efficient VLSI Networks for Parallel Processing Based on Orthogonal Trees
Dhruva Nath
,
S. Maheshwari
,
P. Bhatt
IEEE transactions on computers
1983
Corpus ID: 22667234
In this paper we describe two interconnection networks for parallel processing, namely the orthogonal trees network and the…
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Highly Cited
1981
Highly Cited
1981
Computer Architectures for Pictorial Information Systems
P. Danielsson
,
S. Levialdi
Computer
1981
Corpus ID: 14554894
In the international search for the optimal image processing computer architecture, image parallelism is the key to cost…
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