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Multiply–accumulate operation

Known as: Fused Multiply Add, MAC-unit, Multiply add 
In computing, especially digital signal processing, the multiply–accumulate operation is a common step that computes the product of two numbers and… 
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Related topics

Related topics

43 relations
ARM Cortex-A5ARM Cortex-MARM architectureAccumulator (computing)

Broader (1)

Digital signal processing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Review
2015
Review
2015
Accuracy Assessment in Structure from Motion 3d Reconstruction from Uav-Born Images: the Influence of the Data Processing Methods
Abstract. The evolution of Structure from Motion (SfM) techniques and their integration with the established procedures of… 
Review
2011
Review
2011
Channel allocation in multi-channel wireless mesh networks
Highly Cited
2006
Highly Cited
2006
NEDA: a low-power high-performance DCT architecture
Conventional distributed arithmetic (DA) is popular in application-specific integrated circuit (ASIC) design, and it features on… 
Highly Cited
2002
Highly Cited
2002
A 175 mV multiply-accumulate unit using an adaptive supply voltage and body bias (ASB) architecture
The power dissipation of a digital circuit is minimized by simultaneous control of power supply voltage and body bias. The… 
Highly Cited
2001
Highly Cited
2001
The twin-transistor noise-tolerant dynamic circuit technique
This paper describes a new circuit technique for designing noise-tolerant dynamic logic. It is shown that voltage scaling… 
Highly Cited
1999
Highly Cited
1999
Advances in Brief Differential Expression of MMAC / PTEN in Glioblastoma Multiforme : Relationship to Localization and Prognosis 1
MMAC/PTEN, a tumor suppressor gene located on chromosome 10q, has recently been shown to act as a phosphatidylinositol 3,4,5… 
Highly Cited
1998
Highly Cited
1998
A novel powering-down scheme for low Vt CMOS circuits
In this paper, a novel powering-down scheme with a virtual power/ground rails clamp (VRC) circuit is proposed. It features the 98… 
Highly Cited
1987
Highly Cited
1987
Parallel bit-level pipelined VLSI designs for high-speed signal processing
This paper explores the potential of bit-level pipelined VLSI for high-speed signal processing. We discuss issues involved in… 
Highly Cited
1986
Highly Cited
1986
Efficient procedures for finding the optimum innovation in stochastic coders
  • I. TrancosoB. Atal
  • ICASSP '86. IEEE International Conference on…
  • 1986
  • Corpus ID: 60965308
Stochastic linear predictive coders have the potential for producing high quality synthetic speech at bit rates as low as 4.8… 
Highly Cited
1984
Highly Cited
1984
A Wideband Sampling Wattmeter1
The design and operation of a wideband sampling wattmeter capable of measuring distorted power signals with fundamental… 
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