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Front-end processor

Known as: Communications controller, Processor, Front end processor 
A front end processor (FEP), or a communications processor, is a small-sized computer which interfaces to the host computer a number of networks… 
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Related topics

Related topics

15 relations
CP-6ComputerComputer terminalControl unit

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Case Study : Dramatic Improvements in Teleprotection and Telecontrol Capabilities Via Synchronous Wide-Area Data Acquisition
This paper introduces exciting improvements to the state of the art in power system protection, automation, and control via… 
2011
2011
A real-time Ethernet prototype platform for automotive applications
The increasing number of driver assistance, infotainment and entertainment systems in automobiles results in higher requirements… 
2007
2007
Time-Triggered Ethernet and IEEE 1588 Clock Synchronization
The time-triggered Ethernet unifies real-time and non-real-time traffic into a single communication architecture. We have built a… 
Highly Cited
2005
Highly Cited
2005
An Immunological Algorithm for Global Numerical Optimization
Numerical optimization of given objective functions is a crucial task in many real-life problems. The present article introduces… 
2005
2005
FPGA based hardware architecture for HIT/DLR hand
In this paper, FPGA (field programmable gate array) based hardware architecture for the HIT/DLR hand has been investigated. With… 
Highly Cited
2001
Highly Cited
2001
Colif: A Design Representation for Application-Specific Multiprocessor SOCs
By separating component behavior and communication infrastructure and spanning multiple abstraction levels, Colif lets designers… 
2000
2000
Parallel Processor Configuration Design with Processing/Transmission Costs
A computer configuration design problem where the objective is to configure a parallel processor to do processing in a cost… 
Highly Cited
1998
Highly Cited
1998
Time-triggered architecture for safety-related distributed real-time systems in transportation systems
This paper presents a novel computer architecture for fault-tolerant distributed embedded real-time systems, the Time-Triggered… 
Highly Cited
1995
Highly Cited
1995
The Effects of Latency, Occupancy, and Bandwidth in Distributed Shared Memory Multiprocessors
Distributed shared memory (DSM) machines can be characterized by four parameters, based on a slightly modified version of the… 
1992
1992
Electronic front-end processor for active vision
We suggest that a `vision front end' processor, or VFE, will be a key element of practical vision systems that perform complex… 
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