Skip to search formSkip to main contentSkip to account menu

Frequency-locked loop

Known as: FLL (disambiguation) 
A frequency-lock, or frequency-locked loop (FLL), is an electronic control system that generates a signal that is locked to the frequency of an input… 
Wikipedia (opens in a new tab)

Related topics

Related topics

5 relations
Control systemDiodeNegative feedbackPhase-locked loop

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
An On-Chip Thermal Monitoring System With a Temperature Sensing Area of 52 $\mu$ m2 in 180-nm CMOS
In this brief, an on-chip remote thermal monitoring system with a temperature sensing area of $52~\mu \text{m}^{2}$ is proposed… 
2017
2017
Low Voltage Ride-through Scheme of the PMSG Wind Power System Based on Coordinated Instantaneous Active Power Control
Fast control DC-link voltage is the key to enhance Low-Voltage Ride-Through (LVRT) for the Permanent Magnet Synchronous Generator… 
2017
2017
ARM based implementation of sogi-fll method for power calculation in single-phase power system
For the proper and stable operation of a microgrid, an accurate estimation of the key parameters under various disturbances is… 
2012
2012
A novel three-phase software phase-locked loop based on frequency-locked loop and initial phase angle detection phase-locked loop
This paper proposes a new three-phase software phase-locked loop (SPLL) which operates fast and accurately in unbalanced… 
2009
2009
A digitally-assisted electrothermal frequency-locked loop
A digitally-assisted electrothermal frequency-locked loop (FLL) is presented, whose output frequency is determined by the… 
2008
2008
Distributed Frequency-Locked Loops for Wireless Networks
The establishment of a common frequency reference in a distributed wireless network is a critical factor in enabling cooperative… 
2007
2007
Enhancement of VCO Linearity and Phase Noise by Implementing Frequency Locked Loop
This paper investigates the on-chip implementation of a frequency locked loop (FLL) over a VCO that decreases the phase noise and… 
2007
2007
Design of CMOS integrated phase-locked loops for multi-gigabits serial data links
Design of CMOS integrated phase-locked loops for multi-gigabits serial data links (Dec 2006) Shanfeng Cheng Chair of Advisory… 
2006
2006
A Novel Three-Phase Software Phase-Locked Loop
This paper describes the development of a novel three-phase phase-locked loop (PLL) used to compensate for mains variations by… 
1979
1979
A 50MHz phase and frequency-locked loop
A monolithic phase/frequency locked loop for operation at up to 50MHz will be discussed. The loop combines wide capture range and… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)